Noverclocking?

By on August 13, 2005

Whenever a new CPU comes out, it’s often marketed by it’s clock speed. “2GHz Pentium” means that the timing source in the chip operates at two gigahertz, which means, basically, that the chip completes a single CPU cycle in a whatever teeny-tinyth* of a second it takes for a 2Ghz pules to go through a single cycle. The faster the clock cycles, the faster the CPU cycles. But some parts of the chip rush to squeeze in before the next cycle, while other parts may be waiting to finish.

I read a very short summary today on the idea of asynchronous — that is, clockless — CPUs:

MIT’s Technology Review magazine, in an article written by Claire Tristram, dealt with the radical(?) idea of throwing out the clock. Tristram quotes the advocates for clockless chips as noting that such chips, known alternatively as “asynchronous design” or “self-timed circuits,” are faster and also take less power. Alain Martin, a professor of computer science at Caltech, built the first clockless microprocessor in 1989. Tristram quotes him as saying that “Designers are realizing that distributing a clock across ever more complicated systems is becoming more and more difficult, and that sooner or later it won’t work.” Martin further notes that “as chips get more complex, more and more of the power it takes to run them gets eaten up by the clock itself.”

Tristram writes that dispensing with the overhead of the clock leads to improved electrical efficiency, which leads directly to prolonged battery life, as well as the edge in computing speed. Labs at Sun Microsystems, Intel, and IBM have shown that the chips are faster, Tristram says.

The most intriguing part?

[In 1997,] Intel develops an asynchronous, Pentium-compatible test chip that runs three times as fast, on the half the power, as it synchronous equivalent. The device never makes it out of the lab.

[…]

“It didn’t provide enough of an improvement to justify a shift to a radical technology,” Tristram says. “An asynchronous chip in the lab might be years ahead of any synchronous design, but the design, testing and manufacturing systems that support conventional microprocessor production still have about a 20-year head start.”

So, if I read that correctly, clockless chips would have the potential to go much faster, but the industry has too much capital built on clocked designs to switch until they absolutely have to. The article also mentions that the P4 incorporates some clockless concepts, though, so perhaps we’re on a slow migration.

I hadn’t even heard of clockless chips before today. Anyone have any good commentary on the whole thing?

*(Not an actual value)

Gadgetopia

Comments

  1. IIRC the problem was not a marketing proble but a complete shift of the way CPU are designed. CPUs were always done with ticks. Going tickless would mean a complete new generation of engineers, would also mean redefining a lot of other things from OSs, to applications, to devices, to buses ….

  2. From a design standpoint, synchronous circuit design is very algorithmic – read: fast and easy and able to be implemented in a computer program. Asynchonous design does not yet have well developed algorithms – read: takes longer and requires thinking and, thus, cannot yet be implemented in a computer program. Until the asynchronous equivalent of Verilog and the Cadence tools is developed, designers under the pressure of time constraints will resist.

  3. …would also mean redefining a lot of other things from OSs, to applications, to devices, to buses…

    The original article states the following:

    1997 – Intel develops an asynchronous, Pentium-compatible test chip that runs three times as fast, on the half the power, as it synchronous equivalent. The device never makes it out of the lab.

    Wouldn’t “Pentium-compatible” imply, well, Pentium compatibility?

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